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A 266-nW, 4.9-μVrms Noise, Wideband Neural Recording Amplifier With Folding-Current-Reuse Operational Transconductance Amplifier.

Created on 17 Sep 2025

Authors

Minjae Kim, Jeongho Choi, Joongyu Kim, Sung-Yun Park

Published in

IEEE sensors letters. Volume 9. Issue 9. Epub Jul 31, 2025.

Abstract

This letter presents a nano-watt, low-noise, AC-coupled wideband neural recording amplifier. The nano-watt power consumption has been achieved with 1) doubling of the transconductance by using folding current transistors in a folded-cascode operational transconductance amplifier (OTA) as input transistors (folding-current-reuse (FCR) technique), that also nulls their contribution to output noise and 2) dual supplies where the high and low voltages are assigned for low and high current consuming branches, respectively. Also, the proposed FCR technique indirectly contributes to low power consumption by forming low impedance nodes, which is a difference from a conventional current-reuse OTA in a two-stage amplifier that requires Miller compensation. The amplifier with the FCR technique has been fabricated in a 180 nm standard 1P6M CMOS process. The fabricated chip has been experimentally verified both in benchtop and in vitro using a commerical silicon microelectrode. The amplifier consumes extremely low power of 266 nW from 0.4 and 0.6 V supplies, with the input referred noise of 4.9 µVrms in a wide bandwidth from 0.09 Hz to 7.56 kHz and exhibits 1% THD with an 2.4 mVpp input and an 40 dB closed-loop gain.

PMID:
40959802
Bibliographic data and abstract were imported from PubMed on 17 Sep 2025.

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