Hiring in life sciences? Share your open positions with our professional community. Read more Close

Advertisement

Capacitive in-memory vector-matrix multiplication computing with charge-trap memcapacitors.

Created on 10 Sep 2026

Authors

Junsu Yu, Hwiho Hwang, Hyungjin Kim, Woo Young Choi

Published in

Nano convergence. Volume 13. Issue 1. Sep 10, 2026. Epub Sep 10, 2026.

Abstract

Energy-efficient neural computing is increasingly limited not by computational throughput but by memory access and data movement. In-memory computing architectures offer a promising solution by collocating storage and computation, yet their practical realization remains constrained by static power dissipation, thermal challenges, and limited integration density in existing memory devices. Here, we demonstrate a vertically stackable charge-trap-flash (CTF)-based memcapacitor array that combines the high integration density of 3D NAND technology with the charge-domain computation. A continuous in-situ-doped N+ bottom readout electrode is introduced beneath the lightly doped active layer, decoupling lateral readout resistance from depletion-based capacitance modulation and alleviating the resistance-depletion trade-off of the previous architecture. The fabricated 24 × 48 memcapacitor array operates through transient charge displacement and demonstrates highly uniform array-level characteristics (σ/µ < 0.37%), reliable 16-state closed-loop weight programming, and linear charge-domain VMM with an error below 0.227%. When scaled toward modern 3D NAND dimensions, a verification-inference electrostatic mismatch introduces systematic VMM error, which is reduced by up to 84.6% through an intercell trapped-charge scheme in TCAD simulations. Geometric scaling based on the CV2 relation projects femtojoule-level intrinsic cell read energy at scaled dimensions. A hybrid hardware-software spiking neural network evaluation, in which only the final 24 × 10 layer is mapped to measured arrays, achieves 88.01% CIFAR-10 accuracy compared with 88.17% in software. These results establish vertically stackable memcapacitors as a scalable charge-domain computing platform combining reliable array-level operation with high-density vertical integration.

PMID:
42720719
Bibliographic data and abstract were imported from PubMed on 10 Sep 2026.

Read full publication at:
Please sign in to see all details.

Advertisement

Stats

  • Community rating n/a 0 votes
  • Reviewers' rating n/a 0 votes
  • Your rating

1-terrible, 9-excellent. How would you rate this publication? Sign in in to submit your rating.

  • Recommendations n/a n/a positive of 0 vote(s)
  • Views 16
  • Comments 0

Recommended by

  • No recommendations yet.

Post a comment

You need to be signed in to post comments. You can sign in here.

Comments

There are no comments yet.

Advertisement