Wafer-scale synthesis of WSe₂ for high-performance p-type top-gated transistors and logic circuits.

Authors

Jonggyu Choi, Hayoung Kim, Seungsoo Kim, Mingyu Kim, Seungmin Yang, Juyeong Hong, Seokmin Yun, Ajit K Katiyar, Jong-Hyun Ahn

Published in

Science advances. Volume 12. Issue 41. Pages eaef4354. Oct 09, 2026. Epub Oct 07, 2026.

Abstract

Two-dimensional (2D) transition metal dichalcogenides (TMDs) offer a promising pathway for next-generation electronics due to their exceptional electrical characteristics at atomically thin thickness. Nevertheless, the realization of high-quality p-type 2D-FETs remains a significant challenge for CMOS device integration due to surface damage and unintended n-doping induced during dielectric deposition. In this work, we report the wafer-scale synthesis of p-type WSe₂ films using metal-organic chemical vapor deposition and the fabrication of top-gate p-FETs through a buffer layer strategy, which provides superior electrostatic control and channel stability. The transistors exhibit excellent p-type performance, achieving a hole mobility of 10.49 ± 2.35 cm²V^-1 s^-1 with on/off current ratio exceeding 10⁹. By leveraging the process's scalability, which ensures uniform and damage-free fabrication, we successfully produced reliable wafer-scale PMOS logic circuits. This study provides a scalable, damage-free integration solution for 2D electronics, paving the way for the practical realization of all 2D-based high-density electronics and circuits.

PMID:
42842647
Bibliographic data and abstract were imported from PubMed on 08 Oct 2026.

Read full publication at:
Please sign in to see all details.

Stats

1-terrible, 9-excellent. How would you rate this publication? Sign in in to submit your rating.

Post a comment

You need to be signed in to post comments. You can sign in here.

Comments

There are no comments yet.